Field
The present disclosure relates generally to high-speed data communications, and more particularly, to asymmetric communications between components of electronic devices and in particular to multi-phase encoding and decoding.
Background
High-speed interfaces are often limited by clock skew and are subject to interference. High frequency signals are often transmitted using differential interfaces to provide common-mode rejection for critical signals. In devices such as memory devices, which transmit and receive large amounts of data over wide data and control buses, interfaces maybe expensive and may consume significant power and real-estate on a circuit board.